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1 lt1797 n rail-to-rail input and output n small sot-23 package n gain bandwidth product: 10mhz n C40 c to 85 c operation n slew rate: 2.25v/ m s n low input offset voltage: 1.5mv max n high output current: 25ma min n specified on 3v, 5v and 5v supplies n high voltage gain: 1000v/mv 10k load n high cmrr: 88db min n high psrr: 80db min n input bias current: 300na max n input offset current: 25na max the lt ? 1797 is a unity-gain stable 10mhz op amp avail- able in the small sot-23 package that operates on all single and split supplies with a total voltage of 2.7v to 12v. the amplifier draws 1ma of quiescent current and has a slew rate of 2.25v/ m s. the input common mode range of the lt1797 includes both rails, making it ideal for current sensing applications. the input stage incorporates phase reversal protection to prevent false outputs from occurring when the inputs are driven beyond the supplies. protective resistors are in- cluded in the input leads so that current does not become excessive when the inputs are forced above or below the supplies. the output of the lt1797 can swing to within 50mv of v + and 8mv of v C without drawing excess current in either condition. the amplifier can drive loads up to 25ma and still maintain rail-to-rail capability. the lt1797 op amp is available in the space saving 5-lead sot-23 package. n portable instrumentation n rail-to-rail buffer amplifiers n low voltage signal processing n driving a/d converters n battery-powered systems 10mhz, rail-to-rail input and output op amp in sot-23 , ltc and lt are registered trademarks of linear technology corporation. + lt1797 0.1 f r1 reduces q1 dissipation q1 fmmt493 0.003 1% 3w bzx84c6v8 v z = 6.8v 48v supply (42v to 56v) 3.3k 0805 3 30.1 1% i sense + r1 4.7k v s = 3v 1k 1% v out = 3v ?0.1 ?i sense i sense = 0a to 30a accuracy 3% 48v load 1797 ta01 settles to 1% in 2 s, 1v output step v out fast compact C 48v current sense features descriptio u applicatio s u typical applicatio n u
2 lt1797 symbol parameter conditions min typ max units v os input offset voltage 1 1.5 mv 0 c t a 70 c l 2.5 mv C40 c t a 85 c l 3.0 mv input offset voltage drift (note 4) l 520 m v/ c i b input bias current v cm = v C l C300 C150 na v cm = v + l 50 100 na input bias current drift l 0.1 na/ c i os input offset current v cm = v C l 10 25 na v cm = v + l 10 25 na input noise voltage 0.1hz to 10hz 1.5 m v p-p e n input noise voltage density f = 10khz 20 nv/ ? hz i n input noise current density f = 10khz 0.23 pa / ? hz f = 10khz, v cm = v cc C 0.3v 0.15 pa / ? hz r in input resistance differential 200 330 k w common mode, v cm = 0v to v s C 1.2v 100 m w c in input capacitance 4pf cmrr common mode rejection ratio v cm = 0v to v s C 1.2v l 88 96 db v cm = 0v to v s l 64 72 db input voltage range l 0v s v a vol large-signal voltage gain v s = 3v, v o = 0.5v to 2.5v, r l = 10k 200 1000 v/mv l 150 v/mv v s = 5v, v o = 0.5v to 4.5v, r l = 10k 400 1000 v/mv l 300 v/mv t jmax = 150 c, q ja = 250 c/ w (note 1) total supply voltage (v + to v C ) ........................... 12.6v input differential voltage ..................................... 12.6v input current ..................................................... 10ma output short-circuit duration (note 2) ........ continuous operating temperature range (note 3) ............................................. C 40 c to 85 c specified temperature range ................. C40 c to 85 c junction temperature ........................................... 150 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c consult factory for parts specified with wider operating temperature ranges. the l denotes specifications which apply over the specified temperature range, otherwise specifications are t a = 25 c. v s = 3v, 0v; v s = 5v, 0v, v cm = v out = half supply, pulse power tested, unless otherwise specified. (note 3) 4 5 3 1 out v +in v + ?n top view s5 package 5-lead plastic sot-23 2 + lt1797cs5 LT1797IS5 order part number s5 part marking ltlm lttl absolute axi u rati gs w ww u package/order i for atio uu w electrical characteristics
3 lt1797 symbol parameter conditions min typ max units psrr power supply rejection ratio v s = 2.7v to 12v, v cm = v o = 1v l 80 90 db minimum supply voltage l 2.5 2.7 v v ol output voltage swing low no load, input overdrive = 30mv l 815 mv i sink = 5ma l 80 160 mv i sink = 10ma l 150 250 mv v oh output voltage swing high no load, input overdrive = 30mv l v s C 0.14 v s C 0.05 v i source = 5ma l v s C 0.30 v s C 0.2 v i source = 10ma l v s C 0.39 v s C 0.3 v i sc short-circuit current v s = 5v 25 45 ma v s = 3v 15 25 ma i s supply current 1.1 1.5 ma l 2.0 ma gbw gain bandwidth product (note 5) f = 100khz 6.0 10 mhz 0 c t a 70 c l 5.0 mhz C40 c t a 85 c l 4.5 mhz sr slew rate (note 5) a v = C1 1.3 2.25 v/ m s 0 c t a 70 c l 1.1 v/ m s C40 c t a 85 c l 1.0 v/ m s t r output rise time 10% to 90%, 0.1v step, r l = 10k 55 ns t f output fall time 10% to 90%, 0.1v step, r l = 10k 55 ns t s settling time v s = 5v, d v out = 2v to 0.1%, a v = C1 1.6 m s thd distortion v s = 3v, v out = 1.8v p-p , a v = 1, r l = 10k, f = 1khz 0.001 % fpbw full-power bandwidth (note 6) v out = 2v p-p 360 khz the l denotes specifications which apply over the specified temperature range, otherwise specifications are t a = 25 c. v s = 3v, 0v; v s = 5v, 0v, v cm = v out = half supply, pulse power tested, unless otherwise specified. (note 3) the l denotes specifications which apply over the specified temperature range, otherwise specifications are t a = 25 c. v s = 5v, v cm = 0v, v out = 0v, pulse power tested unless otherwise specified. (note 3) symbol parameter conditions min typ max units v os input offset voltage 1 1.5 mv 0 c t a 70 c l 2.5 mv C40 c t a 85 c l 3.0 mv input offset voltage drift (note 4) l 520 m v/ c i b input bias current v cm = v C l C300 C150 na v cm = v + l 50 100 na input bias current drift l 0.1 na/ c i os input offset current v cm = v C l 10 25 na v cm = v + l 10 25 na input noise voltage 0.1hz to 10hz 1 m v p-p e n input noise voltage density f = 10khz 20 nv/ ? hz i n input noise current density f = 10khz 0.23 pa/ ? hz f = 10khz, v cm = 4.7v 0.15 pa/ ? hz r in input resistance differential 200 330 k w common mode, v cm = C 5v to 3.8v 100 m w c in input capacitance 4pf input voltage range l C5 5 v electrical characteristics
4 lt1797 symbol parameter conditions min typ max units cmrr common mode rejection ratio v cm = C 5v to 3.8v l 83 96 db v cm = C 5v to 5v l 66 76 db a vol large-signal voltage gain v o = 4v, r l = 10k 400 1000 v/mv l 300 v/mv v ol output voltage swing low no load, input overdrive = 30mv l C 4.99 C 4.98 v i sink = 5ma l C 4.92 C 4.87 v i sink = 10ma l C 4.85 C 4.79 v v oh output voltage swing high no load, input overdrive = 30mv l 4.84 4.95 v i source = 5ma l 4.70 4.80 v i source = 10ma l 4.61 4.70 v i sc short-circuit current (note 2) short to gnd 30 50 ma psrr power supply rejection ratio v s = 1.35v to 6v l 80 90 db i s supply current 1.40 2.25 ma l 2.70 ma gbw gain bandwidth product f = 100khz 6.5 11 mhz 0 c t a 70 c l 5.5 mhz C40 c t a 85 c l 5.0 mhz sr slew rate a v = C 1, r l = , v o = 4v, measured at v o = 2v 1.50 2.50 v/ m s 0 c t a 70 c l 1.25 v/ m s C40 c t a 85 c l 1.10 v/ m s t r output rise time 10% to 90%, 0.1v step, r l = 10k 55 ns t f output fall time 10% to 90%, 0.1v step, r l = 10k 55 ns t s settling time d v out = 4v to 0.1%, a v = 1 2.6 m s fpbw full-power bandwidth (note 6) v out = 8v p-p 100 khz note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: a heat sink may be required to keep the junction temperature below absolute maximum. note 3: the lt1797c is guaranteed to meet 0 c to 70 c specifications and is designed, characterized and expected to meet the extended temperature limits, but is not tested at C40 c and 85 c. the lt1797i is guaranteed to meet specified performance from C 40 c to 85 c. note 4: this parameter is not 100% tested. note 5: v s = 3v limit guaranteed by correlation to 5v tests. note 6: full-power bandwidth is calculated from the slew rate: fpbw = sr/2 p v p the l denotes specifications which apply over the specified temperature range, otherwise specifications are t a = 25 c. v s = 5v, v cm = 0v,v out = 0v, pulse power tested unless otherwise specified. (note 3) electrical characteristics
5 lt1797 output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) sinking load current (a) 0.01 output saturation voltage (v) 0.1 1 100 1m 10m 1797 g05 0.001 10 1 t a = 125 c v s = 2.5v v od = 30mv t a = 25 c t a = 55 c output saturation voltage vs input overdrive output short-circuit current vs temperature 0.1hz to 10hz noise voltage input noise voltage density vs frequency temperature ( c) ?0 output current (ma) 40 45 50 25 75 1797 g07 35 30 ?5 0 50 100 125 25 20 v s = 2.5v sourcing current sinking current time (sec) noise voltage (1 v/div) 2468 1797 g08 10 1 03579 v s = 5v frequency (hz) 20 input noise voltage density (nv/ hz) 40 60 80 100 10 1k 10k 100k 1797 g09 0 100 v s = 2.5v typical perfor a ce characteristics uw sourcing load current (a) 1 0.01 output saturation voltage (v) 0.1 1 100 10 10m 1m 1797 g04 v s = 2.5v v od = 30mv t a = 25 c t a = 125 c t a = 55 c input overdrive (mv) 0 output saturation voltage (mv) 60 80 100 120 140 30 50 100 1797 g06 40 20 0 70 90 110 130 150 50 30 10 10 20 40 60 70 80 90 v s = 2.5v i out = 0 output high output low supply current vs supply voltage minimum supply voltage input bias current vs common mode voltage total supply voltage (v) 300 input offset voltage change ( v) ?00 100 300 200 0 200 1.0 1.5 2.0 3.0 4.0 1797 g02 5.0 0.5 0 2.5 3.5 4.5 t a = 125 c t a = 55 c t a = 25 c common mode voltage (v) 200 input bias current (na) 100 0 100 150 ?0 50 1.0 2.0 3.0 4.0 1797 g03 5.0 0.5 0 1.5 2.5 3.5 4.5 v s = 5v, 0v t a = 25 c t a = 125 c t a = 55 c total supply voltage (v) 0 0 supply current (ma) 0.2 0.6 0.8 1.0 6789 1.8 1797 g01 0.4 12345 101112 1.2 1.4 1.6 t a = 125 c t a = 25 c t a = 55 c
6 lt1797 typical perfor a ce characteristics uw slew rate vs temperature gain bandwidth product and phase margin vs supply voltage psrr vs frequency cmrr vs frequency temperature ( c) 50 ?5 1.0 slew rate (v/ s) 2.0 3.5 0 50 75 1797 g13 1.5 3.0 2.5 25 100 125 rising falling v s = 2.5v total supply voltage (v) 0 8 gain bandwidth product (mhz) phase margin (deg) 10 12 9 11 13 2 468 1797 g14 10 1 3 5 7 9 11 12 35 30 45 55 40 50 60 phase margin gain bandwidth product f = 100khz r f = r g = 1k gain bandwidth product and phase margin vs r f and r g frequency (hz) 20 power supply rejection ratio (db) 80 90 10 0 70 40 60 50 30 1k 100k 1m 10m 1797 g16 ?0 10k v s = 2.5v negative supply positive supply frequency (hz) 40 common mode rejection ratio (db) 100 110 30 20 90 60 80 70 50 1k 100k 1m 10m 1797 g17 10 10k v s = 2.5v output impedance vs frequency r f = r g = ( ) 1k 10 gain bandwidth product (mhz) phase margin (deg) 12 14 10k 100k 1797 g15 11 13 20 40 60 10 30 50 phase margin gain bandwidth product v s = 5v frequency (hz) 100 1k 0.01 output impedance ( ) 1 100 10k 100k 1m 10m 1797 g18 0.1 10 gain = 100 gain = 10 v s = 2.5v input noise current density vs frequency gain and phase shift vs frequency gain bandwidth product vs temperature frequency (hz) input noise current density (pa/ hz) 10 1k 10k 100k 1797 g10 100 v s = 2.5v 1.2 1.0 0.8 0.6 0.4 0.2 0 frequency (hz) 0 gain (db) phase (deg) 60 70 ?0 ?0 50 20 40 30 10 10k 1m 10m 100m 1797 g11 ?0 ?0 80 100 ?0 ?0 60 0 40 20 ?0 100 100k v s = 2.5v phase gain temperature ( c) ?0 gain bandwidth product (mhz) 11.5 25 1797 g12 10.0 9.0 ?5 0 50 8.5 8.0 12.0 11.0 10.5 9.5 75 100 125 v s = 5v v s = 2.5v f = 100khz
7 lt1797 typical perfor a ce characteristics uw undistorted output swing vs frequency total harmonic distortion + noise vs frequency total harmonic distortion + noise vs load resistance total harmonic distortion + noise vs output voltage amplitude large-signal response small-signal response v s = 2.5v a v = 1 v s = 2.5v a v = 1 r l = 10k 1797 g26 1797 g27 frequency (hz) 2 output swing (v p-p ) 4 6 8 10 100 10k 100k 1m 1797 g22 0 1k 12 1 3 5 7 9 11 a v = 1 v s = 5v v s = 1.5v frequency (hz) 10 100 0.0001 thd + noise (%) 0.01 1 1k 10k 100k 1797 g23 0.001 0.1 a v = ? a v = 1 r l = 10k v s = 3v, 0v v out = 1.8v p-p v cm = 1v load resistance to ground (k ) 0.01 thd + noise (%) 0.1 1 10 1 10 100 1797 g24 0.001 0.1 v s = 3v, 0v v in = 1.8v p-p v cm = 1.5v v s = 3v, 0v v in = 1.8v p-p v cm = 1v v s = 3v total a v = 1 f = 1khz output voltage (v p-p ) 0.01 thd + noise (%) 1 10 023 1797 g25 0.001 1 0.1 f = 1khz v cm = half supply r l = 10k a v = ? v s = 3v, 0v a v = 1 v s = 3v, 0v a v = 1 v s = 1.5v a v = 1 v s = 1.5v open-loop gain settling time to 0.1% vs output step output voltage (v) ? change in input offset voltage (50 v/div) 1797 g19 ? ? ? 1 012 345 v s = 5v r l = 50k r l = 2k r l = 10k settling time ( s) 1.0 output step (v) 4 3 2 1 0 ? ? ? ?4 2.6 1797 g20 1.4 1.8 2.2 3.0 2.4 1.2 1.6 2.0 2.8 a v = 1 a v = 1 a v = 1 v s = 5v a v = 1 capacitive load handling overshoot vs capacitive load capacitive load (pf) 10 20 overshoot (%) 25 30 35 40 100 1000 10000 1797 g21 15 10 5 0 45 50 a v = 1 a v = 5 a v = 10 a v = 2 v s = 2.5v
8 lt1797 applicatio s i for atio wu uu supply voltage the positive supply pin of the lt1797 should be bypassed with a small capacitor (about 0.1 m f) within an inch of the pin. when driving heavy loads an additional 4.7 m f electro- lytic capacitor should be used. when using split supplies the same is true for the negative supply pin. inputs the lt1797 is fully functional for an input signal range from the negative supply to the positive supply. figure 1 shows a simplified schematic of the amplifier. the input stage consists of two differential amplifiers, a pnp stage q3/q4 and an npn stage q1/q2 that are active over different ranges of input common mode voltage. the pnp differential pair is active for input common mode voltages v cm between the negative supply to approximately 1.2v below the positive supply. as v cm moves closer toward the positive supply, the transistor qb1 will steer the tail current i1 to the current mirror q5/q6, activating the npn differential pair and the pnp pair becomes inactive for the rest of the input common mode range up to the positive supply. the input offset voltage and the input bias current are dependent on which input stage is active. the input offset voltage is trimmed on a single 5v supply with the common mode at 1/2 supply and is typically 1mv with the pnp stage active. the input offset of the npn stage is untrimmed and is typically 1.5mv. the input bias current polarity depends on the input common mode voltage. when the pnp differential pair is active, the input bias currents flow out of the input pins. they flow in the opposite direction when the npn input stage is active. the offset error due to the input bias currents can be minimized by equalizing the noninverting and inverting source impedance. the input stage of the lt1797 incorporates phase reversal protection to prevent false outputs from occurring when the inputs are driven up to 5v beyond the rails. protective resistors are included in the input leads so that current does not become excessive when the inputs are forced beyond the supplies or when a large differential signal is applied. output the output is configured with a pair of complementary common emitter stages q19/q20, which enable the out- put to swing from rail-to-rail. the output voltage swing of the lt1797 is affected by input overdrive as shown in the typical performance characteristics. when monitoring input voltages within 50mv of v + or within 8mv of v C , some gain should be taken to keep the output from clipping. the output of the lt1797 can deliver large load currents; the short-circuit current limit is typically 50ma at 5v. take care to keep the junction temperature of the ic below the absolute maximum rating of 150 c. the output of the amplifier has reverse biased diodes to each supply. if the output is forced beyond either supply, unlimited current will flow through these diodes. the lt1797 can drive capacitive loads up to 200pf on a single 5v supply in a unity gain configuration. when there is a need to drive larger capacitive loads, a resistor of a couple hundred ohms should be connected between the output and the capacitive load. the feedback should still be taken from the output so that the resistor isolates the capacitive load to ensure stability. the low input bias current of the lt1797 makes it possible to use high value feedback resistors to set the gain. however, care must be taken to insure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability.
9 lt1797 distortion there are two main contributors to distortion in op amps: output crossover distortion as the output transitions from sourcing to sinking current and distortion caused by nonlinear common mode rejection. if the op amp is operating in the inverting mode, there is no common mode induced distortion. if the op amp is operating in the pnp input stage (input is not within 1.2v of v + ), the cmrr is applicatio s i for atio wu uu very good, typically 95db. when the lt1797 switches between input stages there is significant nonlinearity in the cmrr. lower load resistance increases the output cross- over distortion, but has no effect on the input stage transition distortion. for lowest distortion the lt1797 should be operated single supply, with the output always sourcing current and with the input voltage swing between ground and (v + C 1.2v). see the typical performance characteristic curves. figure 1. simplified schematic 1797 f01 q18 q1 q3 q4 qb1 q7 q11 q13 q9 q6 q2 q12 q8 q14 q10 q5 q17 q15 q19 q20 q16 r1 r3 r4 r7 r8 r5 r6 r2 d1 d2 ?n +in bias i1 out +1 +1 cm c1 c2 i3 i2 i4 i5 i6 i7 1/2 supply
10 lt1797 typical applicatio s u single supply hi-gain 80khz photodiode amplifier ultra-low noise, 5v supply, rail-to-rail output amplifier + lt1797 3v 3v r2 1k r4 1k r5 100k r6 330 r3 10k r1 100k c1 0.1 f c2 0.1 f c3 1000pf c p * 1797 ta02 *c p = sum of photodiode capacitance, parasitic layout capacitance and lt1797 input capacitance @ 10pf. transimpedance gain: a z = 10m . r6, c3 limit the noise bandwidth to 500khz. output noise @ 1.8mv rms . r1, c p and lt1797 gbw set upper limit on bandwidth. r4, c2 set lower 1.6khz limit on gain of 101. photodiode sfh213fa + + r1 10k r5 1k r3 4.99k r2 4.99k ?v ?v 5v 5v lt1028 lt1797 in out c1 2200pf r4 10 1797 ta03 total input voltage noise @ 0.94nv/ hz (including 10 resistor) bandwidth @ 40khz a v = 500
11 lt1797 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. u package descriptio dimensions in inches (millimeters) unless otherwise noted. s5 package 5-lead plastic sot-23 (ltc dwg # 05-08-1633) 0.95 (0.037) ref 1.50 ?1.75 (0.059 ?0.069) 0.35 ?0.55 (0.014 ?0.022) 0.35 ?0.50 (0.014 ?0.020) five places (note 2) s5 sot-23 0599 2.80 ?3.00 (0.110 ?0.118) (note 3) 1.90 (0.074) ref 0.90 ?1.45 (0.035 ?0.057) 0.90 ?1.30 (0.035 ?0.051) 0.00 ?0.15 (0.00 ?0.006) 0.09 ?0.20 (0.004 ?0.008) (note 2) 2.60 ?3.00 (0.102 ?0.118) note: 1. dimensions are in millimeters 2. dimensions are inclusive of plating 3. dimensions are exclusive of mold flash and metal burr 4. mold flash shall not exceed 0.254mm 5. package eiaj reference is sc-74a (eiaj)
12 lt1797 rise time vs supply voltage (600mv output step) supply voltage 10% to 90% rise time 1.5v 830ns 2.5v 800ns 5v 700ns 1797f lt/tp 0401 4k ? printed in usa ? linear technology corporation 2000 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts part number description comments lt1630/lt1631 dual/quad 30mhz, 10v/ m s rail-to-rail input high dc accuracy, 525 m v v os(max) , 70ma output and output op amps current, max supply current 4.4ma per amp lt1638/lt1639 dual/ouad 1.2mhz, 0.4v/ m s, over-the-top tm micropower 170 m a supply current, single supply input range C0.4v to 44v, rail-to-rail input and output op amps rail-to-rail input and output. lt1783 micropower over-the-top sot-23 rail-to-rail input sot-23 package, micropower 220 m a per amplifier, and output op amp rail-to-rail input and output, 1.2mhz gain bandwidth lt1880 sot-23 rail-to-rail output, picoamp input current 150mv maximum offset voltage, 900pa maximum bias current, precision op amp 1.1mhz gain bandwidth, C40 c to 85 c temperature range over-the-top is a trademark of linear technology corporation. u typical applicatio + lt1797 photodiode sfh213fa siemens/infineon v s = 1.5v to 5v 3pf 100k v + v 1797 ta04 1mhz photodiode transimpedance amplifier response of photodiode amplifier 100mv/div 2 m s/div

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